PCIe/Ethernet and Ultrascale Link Solution Expert / Architect
Synopsys
Key Responsibilities
- Lead the design and definition of subsystem architecture
- Collaborate with RTL designers, verification teams, physical design teams, and customers
- Drive architectural trade-offs to optimize for power, performance, and area
- Perform design space exploration, simulation, and modeling
- Ensure architecture integrates seamlessly with external interfaces, subsystems, and third-party IPs
- Create detailed architecture specifications, interface definitions, and block diagrams
- Stay up-to-date with latest advancements in SoC/IP design
- Provide technical leadership and mentorship to design teams
- Lead architectural development for complex controller/IP projects
Requirements
Education
Bachelor's or Master's degree in Electrical/Electronics/Computer Engineering or equivalent
Experience
12+ years
Required Skills
- SoC architecture
- Micro-architecture
- Design specifications
- PPA analysis and optimization
- Knowledge of PCIe, Ethernet, USB, DDR, UCIe protocols
- Processor/interconnect/debug/bus architecture
- SoC level clocking, reset, and low power architectures
- High-performance compute hardware/architecture design
- SoC interconnects and memory architectures
- Security architectures
- Hardware/software co-design
- System-level optimization
- EDA tools and design flows
- Presentational skills
- Cross-cultural communication
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